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ISL88031
Data Sheet March 31, 2006 FN8227.0
Quintuple Voltage Monitor
The ISL88031 is a quintuple voltage-monitoring supervisor combining competitive reset threshold accuracy and low power consumption. This device combines popular functions such as Power On Reset, Undervoltage Supply Supervision, reset signaling and Manual Reset. Monitoring up to five different voltages in a small 8 Ld MSOP package, the ISL88031 devices can help to lower system cost, reduce board space requirements, and increase the reliability of multi-voltage systems. Low VDD detection circuitry protects the user's system from low voltage conditions, resetting the system when VDD or any of the other monitored power supply voltages fall below their respective minimum voltage thresholds. The reset signal remains asserted until all of these voltages return to proper operating levels and stabilize. With two of the five voltage monitors being preset for common supplies, users can adjust the threshold voltages of the third, fourth, and fifth voltage monitors in order to meet specific system level requirements.
Features
* Quintuple Voltage Monitoring * Fixed-Voltage Options Allow Precise Monitoring of +5.0V, +3.3V, +3.0V, +2.5V and +1.8V Power Supplies * Adjustable Voltage Inputs Monitor Voltages > 0.6V * 120ms Nominal Reset Pulse Width * Manual Reset Capability * Reset Signals Valid Down to VDD = 1V * Accurate 1.8% Voltage Threshold * Immune to Power-Supply Transients * Low 19A Maximum Supply Current at 5V * Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
* Telecom & Datacom Systems * Routers & Servers * Access Concentrators * Cable/Satellite Applications * Desktop & Notebook Computer Systems * Data Storage Equipment * Set-Top Boxes * Industrial Equipment * Multi-Voltage Systems
Pinout
ISL88031 (8 LD MSOP) TOP VIEW
8 7 6 5
MR VDD V2MON GND
1 2 3 4
RST V5MON V4MON V3MON
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
ISL88031 Ordering Information
PART NUMBER (Note 1, 2) ISL88031IU8HFZ ISL88031IU8HEZ ISL88031IU8HCZ ISL88031IU8HAZ ISL88031IU8ECZ ISL88031IU8EAZ NOTES: 1. Add "-TK" suffix for Tape and Reel. 2. Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. PART MARKING AMA ANZ APR APS APT APZ VTH1 4.64V 4.64V 4.64V 4.64V 2.90V 2.90V VTH2 3.09V 2.92V 2.32V 1.69V 2.32V 1.69V TEMP RANGE (C) -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 PACKAGE (Pb-free) 8 Ld MSOP 8 Ld MSOP 8 Ld MSOP 8 Ld MSOP 8 Ld MSOP 8 Ld MSOP PKG. DWG. # M8.118 M8.118 M8.118 M8.118 M8.118 M8.118
Pin Descriptions
ISL88031 1 2 3 4 5 6 7 8 NAME MR VDD V2MON GND V3MON V4MON V5MON RST FUNCTION Active-Low Open Drain Manual Reset Input with internal pull-up resistor Chip Bias Input and integrated preset under voltage monitor Second Preset Under-Voltage Monitor Input Ground Adjustable Third Under-Voltage Monitor Input Adjustable Fourth Under-Voltage Monitor Input Adjustable Fifth Under-Voltage Monitor Input Active-Low Open Drain Reset Output
Functional Block Diagram
VDD MR VREF V2MON POR PB
RST VREF V3MON VREF V5MON V4MON
VREF
GND
VREF
2
FN8227.0 March 31, 2006
ISL88031
Absolute Maximum Ratings
Temperature under bias . . . . . . . . . . . . . . . . . . . . . .-40C to +125C Voltage on any pin with respect to GND . . . . . . . . . . . . -1.0V to +7V D.C. output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Thermal Information
Thermal Resistance (Typical, Note 3) MSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . JA (C/W) 145
Recommended Operating Conditions
Operating temperature range (Industrial). . . . . . . . . .-40C to +85C Storage temperature range . . . . . . . . . . . . . . . . . . .-65C to +150C Lead temperature (soldering, 10s). . . . . . . . . . . . . . . . . . . . . . 300C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 3. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
SYMBOL VDD IDD1 IDD2 IDDA
Over the recommended operating conditions unless otherwise specified. TEST CONDITIONS MIN 2.0 VDD = 5.0V V2MON = 3.3V V3, V4, V5MON = 1.0V 14 5.5 19 TYP MAX 5.5 19 7 100 UNITS V A A nA
PARAMETER Supply Voltage Range VDD Supply Current V2MON Input Current V3, V4, V5MON Input Current
VOLTAGE THRESHOLDS VTH1 Fixed Voltage Trip Point for VDD ISL88031IU8HxZ ISL88031IU8ExZ VTH1HYST Hysteresis of VTH1 VTH1 = 4.64V VTH1 = 2.90V VTH2 Fixed Voltage Trip Point for V2MON ISL88031IU8xFZ ISL88031IU8xEZ ISL88031IU8xCZ ISL88031IU8xAZ 3.022 2.901 2.291 1.652 4.551 2.814 4.634 2.866 46 29 3.078 2.955 2.333 1.683 3.133 3.008 2.375 1.713 4.717 2.917 V V mV mV V V V V
VTH2HYST
Hysteresis of VTH2
VTH2 = 3.09V VTH2 = 2.92V VTH2 = 2.32V VTH2 = 1.69V
37 29 23 17
mV mV mV mV
VREF
V3MON Adj. Reset Threshold Voltage
VTH for V3MON
0.589 0.585
0.600 0.598 3
0.611 0.611
V V mV
V4MON, V5MON Adj. Reset Threshold Voltage VTH for V4MON, V5MON VREFHYST RESET VOL Reset Output Voltage Low VDD 3.3V, Sinking 2.5mA VDD < 3.3V, Sinking 1.5mA tRPD tPOR CLOAD VTH to Reset Asserted Delay POR Timeout Delay Load Capacitance on Reset Pins Hysteresis Voltage
0.05 0.05 6 80 120 5
0.40 0.40
V V s
180
ms pF
3
FN8227.0 March 31, 2006
ISL88031
Electrical Specifications
SYMBOL MANUAL RESET VMRL VMRH tMR RPU MR Input Voltage Low MR Input Voltage High MR Minimum Pulse Width Internal Pull-Up Resistor VDD-0.6 550 10 0.8 V V ns k Over the recommended operating conditions unless otherwise specified. (Continued) TEST CONDITIONS MIN TYP MAX UNITS
PARAMETER
Pin Description
RST
The RST output is an open drain output which is asserted low whenever 1. the device is initially powered up to 1V or 2. VDD, V2MON, V3MON, V4MON, or V5MON fall below their minimum voltage sense level.
V4MON VDD V2MON V3MON ISL88031 MR PB reset signal RST
MR
The MR input is an active low debounced input to which a user can connect a push-button to add manual reset capability or use a signal to pull low. MR has an internal pullup resistor.
V5MON GND
VDD
The VDD pin is the IC power supply terminal. The voltage at this pin is compared against an internal factory-programmed voltage trip point, VTH1. RST is first asserted low when the device is initially powered and VDD < 1 V and then at any time thereafter when VDD falls below VTH1. The device is designed with hysteresis to help prevent chattering due to noise and is immune to brief power-supply transients.
FIGURE 1. TYPICAL APPLICATION DIAGRAM
Principles of Operation
The ISL88031 device provide those functions needed for monitoring critical voltages such as power-supply and battery functions in microprocessor systems. It provides such features as Power On Reset control, Supply Voltage Supervision, and Manual Reset Assertion. The integration of all these features along with competitive reset threshold accuracy and low power consumption make the ISL88031 device suitable for a wide variety of applications needing multi-voltage monitoring. See Figure 1 for typical application diagram.
V2MON
The V2MON input is the second preset monitored voltage that causes the RST output to go low when the voltage on V2MON falls below VTH2.
V3MON, V4MON, and V5MON
The VxMON inputs provide monitoring and UV compliance of three additional voltages through resistor dividers. A reset is issued on the ISL88031 if the voltage on any VxMON falls below the internal VREF of 0.6V.
Low Voltage Monitoring
During normal operation, the ISL88031 monitors the voltage levels of VDD, V2MON, V3MON, V4MON, and V5MON. If the voltage on any of these five inputs falls below their respective voltage trip points, a reset is asserted (RST = low) to prevent the microprocessor from operating during a power failure or brownout condition. This reset signal remains low until the voltages exceeds the voltage threshold settings for the reset time delay period tPOR. The ISL88031 allows users to customize the minimum voltage sense level for three of the five monitored voltages. For example, the user can adjust the voltage input trip point (VTRIP) for V3MON, V4MON and V5MON inputs. To do this, connect an external resistor divider network to the VxMON pin in order to set the trip point to some other voltage above 600mV according to the following formula: VTRIP = 0.6V X (R1 + R2) / R2
4
FN8227.0 March 31, 2006
ISL88031
Power On Reset (POR)
Applying power to the ISL88031 activates a POR circuit which makes the reset pin(s) active (i.e. RST goes high while RST goes low). These signals provide several benefits: * It prevents the system microprocessor from starting to operate with insufficient voltage. * It prevents the processor from operating prior to stabilization of the oscillator. * It ensures that the monitored device is held out of operation until internal registers are properly loaded. * It allows time for an FPGA to download its configuration prior to initialization of the circuit. The reset signal remains active until VDD rises above the minimum voltage sense level for time period tPOR. This ensures that the supply voltage has stabilized to sufficient operating levels.
The ISL88031EVAL1 and Applications
The ISL88031EVAL1 supports all variants of the ISL88031 devices, enabling evaluation of basic functional operation and common application implementations. Figure 4 illustrates the ISL88031EVAL1 in schematic and photographic forms. The ISL88031EVAL1 has two isolated circuits, the left circuit is populated with the ISL88031IU8HFZ (VDD VTH1 = 4.64V, V2MON VTH2 = 3.08V). The right circuit is unpopulated for the user to customize to provide a specific voltage monitoring solution with the accompanying loose packed variants. With adequate bias on the two preset and the three adjustable monitor inputs the RST output will release to pull high indicating that all supplies are compliant for a minimum of tPOR. For the ISL88031EVAL1 as shipped the VDD and V2MON nominal thresholds are as previously noted with the voltage thresholds being monitored by V3MON, V4MON and V5MON being nominally 1.990V, 1.44V and 0.95V respectively.
Manual Reset
The manual-reset input (MR) allows the user to trigger a reset by using a push-button switch or by signaling the input low. The MR input is an active low debounced input. Reset is asserted if the MR pin is pulled low to less than 100mV for the minimum MR pulse width or longer while the push-button is closed. After MR is released, the reset output remains asserted low for tPOR (200ms) and then is released. Figures 2 and 3 illustrate the operation ISL88031's operation. Figure 4 shows the ISL88031EVAL, the evaluation platform for this family of voltage monitors. Figures 5 and 6 illustrate RST output response times.
Special Application Considerations
Using good decoupling practices on bias and other monitoring inputs will prevent transients (i.e. due to switching noises and short duration droops in the supply voltage) from causing unwanted resets. Although the internal ISL88031 threshold references are guaranteed over the full temp range accuracy errors due to external component tolerances and distribution looses will occur. High tolerance resistors and layout for extreme accuracy and critical performance must be considered.
VTH1 / 2 VDD / V2MON
1V
>tMR
MR tPOR tRPD tPOR tPOR
RST
>tMD
FIGURE 2. POWER SUPPLY MONITORING DIAGRAM
5
FN8227.0 March 31, 2006
ISL88031
VMON VTH tRPD tPOR
RST
FIGURE 3. VOLTAGE MONITORING DIAGRAM
FIGURE 4. ISL88031EVAL1 SCHEMATIC AND PHOTOGRAPH
5V
5V
3.3V 2.1V 1.5V 1V tPOR = 107ms 20ms/DIV FIGURE 5. ISL88031 tPOR RST 5V/DIV
3.3V 2.1V 1.5V 1V tRPD = 7.5s 20s/DIV FIGURE 6. ISL88031 tRPD RST 5V/DIV
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FN8227.0 March 31, 2006
ISL88031 Mini Small Outline Plastic Packages (MSOP)
N
M8.118 (JEDEC MO-187AA)
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
E1 E
INCHES SYMBOL MIN 0.037 0.002 0.030 0.010 0.004 0.116 0.116 MAX 0.043 0.006 0.037 0.014 0.008 0.120 0.120
MILLIMETERS MIN 0.94 0.05 0.75 0.25 0.09 2.95 2.95 MAX 1.10 0.15 0.95 0.36 0.20 3.05 3.05 NOTES 9 3 4 6 7 15o 6o Rev. 2 01/03
INDEX AREA
-B12 TOP VIEW 0.25 (0.010) GAUGE PLANE SEATING PLANE -C4X R1 R 0.20 (0.008) ABC
A A1 A2 b c D E1
4X L L1
e E L
0.026 BSC 0.187 0.016 0.199 0.028
0.65 BSC 4.75 0.40 5.05 0.70
A
A2
A1
-He D
b
0.10 (0.004) -A0.20 (0.008)
C
SEATING PLANE
L1 N R
0.037 REF 8 0.003 0.003 5o 0o 15o 6o
0.95 REF 8 0.07 0.07 5o 0o
C a C L E1
C
R1 0
SIDE VIEW
-B-
0.20 (0.008)
CD
END VIEW
NOTES: 1. These package dimensions are within allowable dimensions of JEDEC MO-187BA. 2. Dimensioning and tolerancing per ANSI Y14.5M-1994. 3. Dimension "D" does not include mold flash, protrusions or gate burrs and are measured at Datum Plane. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension "E1" does not include interlead flash or protrusions and are measured at Datum Plane. - H - Interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. Formed leads shall be planar with respect to one another within 0.10mm (0.004) at seating Plane. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension "b" does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of "b" dimension at maximum material condition. Minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch). 10. Datums -A -H- . and - B - to be determined at Datum plane
11. Controlling dimension: MILLIMETER. Converted inch dimensions are for reference only.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 7
FN8227.0 March 31, 2006

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